Commit Graph

3555 Commits

Author SHA1 Message Date
SChernykh da5a5674b4 Added Zen4 (Hawk Point) CPUs detection 2025-10-15 08:07:58 +02:00
SChernykh a659397c41 Fix: correct FCMP++ version number 2025-10-05 13:24:55 +02:00
xmrig 20acfd0d79 Merge pull request #3718 from SChernykh/dev
Solo mining: added support for FCMP++ hardfork
2025-10-05 18:04:23 +07:00
SChernykh da683d8c3e Solo mining: added support for FCMP++ hardfork 2025-10-05 13:00:21 +02:00
XMRig 255565b533 Merge branch 'xtophyr-master' into dev 2025-09-22 21:31:28 +07:00
XMRig 878e83bf59 Merge branch 'master' of https://github.com/xtophyr/xmrig into xtophyr-master 2025-09-22 21:31:14 +07:00
Christopher Wright 7abf17cb59 adjust instruction/register suffixes to compile with gcc-based assemblers. 2025-09-21 14:57:42 -04:00
Christopher Wright eeec5ecd10 undo this change 2025-09-20 08:38:40 -04:00
Christopher Wright 93f5067999 minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc) 2025-09-20 08:32:32 -04:00
XMRig dd6671bc59 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2025-06-29 12:29:01 +07:00
XMRig a1ee2fd9d2 Improved LibreSSL support. 2025-06-29 12:28:35 +07:00
xmrig 2619131176 Merge pull request #3680 from benthetechguy/armhf
Add armv8l to list of 32 bit ARM targets
2025-06-25 04:14:22 +07:00
Ben Westover 1161f230c5 Add armv8l to list of 32 bit ARM targets
armv8l is what CMAKE_SYSTEM_PROCESSOR is set to when an ARMv8 processor
is in 32-bit mode, so it should be added to the ARMv7 target list even
though it's v8 because it's 32 bits. Currently, it's not in any ARM
target list which means x86 is assumed and the build fails.
2025-06-24 15:28:01 -04:00
XMRig d2363ba28b v6.24.1-dev 2025-06-23 08:37:15 +07:00
XMRig 1676da1fe9 Merge branch 'master' into dev 2025-06-23 08:36:52 +07:00
XMRig 6e4a5a6d94 v6.24.0 2025-06-23 07:44:53 +07:00
XMRig 273133aa63 Merge branch 'dev' 2025-06-23 07:44:05 +07:00
xmrig c69e30c9a0 Update CHANGELOG.md 2025-06-23 05:39:26 +07:00
XMRig 6a690ba1e9 More DNS cleanup. 2025-06-20 23:45:53 +07:00
XMRig 545aef0937 v6.24.0-dev 2025-06-20 08:34:58 +07:00
xmrig 9fa66d3242 Merge pull request #3678 from xmrig/dns_ip_version
Improved IPv6 support.
2025-06-20 08:33:50 +07:00
XMRig ec286c7fef Improved IPv6 support. 2025-06-20 07:39:52 +07:00
xmrig e28d663d80 Merge pull request #3677 from SChernykh/dev
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)
2025-06-19 18:07:54 +07:00
SChernykh aba1ad8cfc Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time) 2025-06-19 12:58:31 +02:00
xmrig bf44ed52e9 Merge pull request #3674 from benthetechguy/armhf
cflags: Add lax-vector-conversions on ARMv7
2025-06-19 04:46:02 +07:00
Ben Westover 762c435fa8 cflags: Add lax-vector-conversions on ARMv7
lax-vector-conversions is enabled in the CXXFLAGS but not CFLAGS for ARMv7.
This commit adds it to CFLAGS which fixes the ARMv7 build (Fixes: #3673).
2025-06-18 16:38:05 -04:00
xmrig 48faf0a11b Merge pull request #3671 from SChernykh/dev
Hwloc: fixed detection of L2 cache size for some complex NUMA topologies
2025-06-17 18:52:43 +07:00
SChernykh d125d22d27 Hwloc: fixed detection of L2 cache size for some complex NUMA topologies 2025-06-17 13:49:02 +02:00
XMRig 9f3591ae0d v6.23.1-dev 2025-06-16 21:29:17 +07:00
XMRig 6bbbcc71f1 Merge branch 'master' into dev 2025-06-16 21:28:48 +07:00
XMRig e5a7a69cc0 v6.23.0 2025-06-16 21:00:42 +07:00
XMRig f354b85a7b Merge branch 'dev' 2025-06-16 21:00:12 +07:00
xmrig 5ed8d79574 Update CHANGELOG.md 2025-06-16 20:46:33 +07:00
XMRig fc395a5800 Update ARM CPUs database. 2025-06-16 19:54:08 +07:00
XMRig 9138690126 v6.23.0-dev 2025-06-16 02:05:43 +07:00
XMRig d58061c903 Add detection for _aligned_malloc. 2025-06-15 20:06:19 +07:00
XMRig 3b863cf88f Fixed __umul128 for MSVC ARM64. 2025-06-15 04:58:03 +07:00
XMRig 9c7468df64 Fixed user agent string. 2025-06-15 00:21:23 +07:00
xmrig a18fa269a6 Merge pull request #3666 from SChernykh/dev
Better detection of aligned malloc functions
2025-06-14 23:09:05 +07:00
SChernykh bcc5581535 Better detection of aligned malloc functions 2025-06-14 18:00:27 +02:00
XMRig dba336aa04 Update hwloc for MSVC. 2025-06-14 22:11:33 +07:00
XMRig 3ff41f7c94 Fixed UTF-8 paths support for the config file with Clang compiler on Windows ARM64. 2025-06-14 15:38:25 +07:00
XMRig faa3d55123 Remove deprecated -Ofast for Clang. 2025-06-13 21:53:03 +07:00
XMRig 9e7cf69ac3 Detect CPU name and AES instructions on Windows ARM64. 2025-06-13 21:02:10 +07:00
XMRig 57a4998ae2 Fix Linux build. 2025-06-13 04:05:30 +07:00
XMRig 34b4448a81 Split BasicCpuInfo_arm. 2025-06-13 03:57:13 +07:00
XMRig 650d794fb1 Initial Windows ARM64 support via MSYS2. 2025-06-13 03:00:34 +07:00
XMRig 064a61988a Update deps scripts. 2025-06-12 00:52:49 +07:00
xmrig 2ab7f85ccd Merge pull request #3665 from SChernykh/dev
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread
2025-06-11 23:40:46 +07:00
SChernykh e4c30eb0dd Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread 2025-06-11 18:34:50 +02:00